Electric User's Manual, version 9.07

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Steven M. Rubin
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November 1, 2016

design example

Table of Contents

Chapter 1: INTRODUCTION
1-1: Welcome
1-2: About Electric
1-3: Running Electric
1-4-1: Introduction to Source Code
1-4-2: Source code in the JAR Files
1-4-3: Command-line Access to the savannah.gnu.org Repository
1-4-4: Netbeans Access to the savannah.gnu.org Repository
1-4-5: Eclipse Access to the savannah.gnu.org Repository
1-5: Plug-Ins
1-6: Fundamental Concepts
1-7: The Display
1-8: The Mouse
1-9: The Keyboard
1-10-1: Make a Cell
1-10-2: Create a Node
1-10-3: Highlighting
1-10-4: Make an Arc
1-10-5: Constraints
1-10-6: Adding Contacts to a Transistor
1-10-7: Hierarchy
1-10-8: Exports
1-11-1: Make a Cell
1-11-2: Create a Node
1-11-3: Highlighting
1-11-4: Make an Arc
1-11-5: Multi-Input gates and Negation
1-11-6: Constraints
1-11-7: Hierarchy and Icons
1-11-8: Final Points
1-12-1: Introduction to Schematic/Layout Tutorial
1-12-2: Schematic Entry
1-12-3: Layout
1-12-4: Hierarchical Design
1-12-5: Analysis
Chapter 2: BASIC EDITING
2-1-1: Selecting Nodes and Arcs
2-1-2: Selection Appearance
2-1-3: Unusual Selection: Areas and Text
2-1-4: Controlling Selection
2-1-5: Easy and Hard Selection
2-2-1: Node Creation
2-2-2: Arc Creation
2-2-3: Special Cases
2-3: Circuit Deletion
2-4-1: Movement
2-4-2: Other Modification
2-5-1: Node Sizing
2-5-2: Arc Sizing
2-6: Changing Orientation
Chapter 3: HIERARCHY
3-1: Cells
3-2: Cell Creation and Deletion
3-3: Creating Instances
3-4: Examining Cell Instances
3-5: Moving Up and Down the Hierarchy
3-6-1: Export Creation
3-6-2: Export Information
3-6-3: Export Deletion and Movement
3-7-1: Cell Lists
3-7-2: Cell Graphing
3-7-3: Cell Properties
3-8: Rearranging Cell Hierarchy
3-9-1: Introduction to Libraries
3-9-2: Reading Libraries
3-9-3: Writing Libraries
3-9-4: Standard Cell Libraries
3-10: Copying Cells Between Libraries
3-11-1: Setting a Cell's View
3-11-2: Switching between Views of a Cell
3-11-3: Creating and Deleting Views
3-11-4: Automatic Icon Generation
Chapter 4: DISPLAY
4-1: The Tool Bar
4-2: The Messages Window
4-3: Creating and Deleting Editing Windows
4-4-1: Zooming
4-4-2: Panning
4-4-3: Focus
4-5-1: The Component Menu
4-5-2: The Cell Explorer
4-5-3: Layer Visibility
4-6-1: Electric's Color Model
4-6-2: Editing Colors and Patterns
4-7-1: Drawing a Grid
4-7-2: Aligning to a Grid
4-7-3: Aligning to Objects
4-7-4: Measuring
4-8: Printing
4-9: Text Windows
4-10-1: Introduction to 3D
4-10-2: Preferences
4-10-3: Behaviors and Animation
4-11: Waveform Windows
Chapter 5: ARCS
5-1: Introduction to Arcs
5-2-1: Rigid and Fixed-Angle Arcs
5-2-2: Slidable Arcs
5-2-3: Constraint Propagation
5-3: Setting Constraints
5-4-1: Directionality
5-4-2: Negation
5-4-3: End Extension
5-4-4: Naming
5-4-5: Curvature
5-5: Default Arc Properties
Chapter 6: ADVANCED EDITING
6-1: Making Copies
6-2: Creation Defaults
6-3: Preferences
6-4: Making Arrays
6-5: Spreading Circuitry
6-6: Replacing Circuitry
6-7: Undo Control
6-8-1: Understanding Text
6-8-2: Selecting Text
6-8-3: Modifying Text
6-8-4: Text Defaults
6-8-5: Cell Parameters
6-9-1: Introduction to Networks
6-9-2: Naming Networks
6-9-3: Bus Naming
6-9-4: Power and Ground
6-9-5: Global Networks
6-10-1: Introduction to Outlines
6-10-2: Manipulating Outlines
6-10-3: Special Outline Generation
6-11: Interpretive Languages
6-12: Project Management
6-13: CVS Version Control
6-14: Emergencies
Chapter 7: TECHNOLOGIES
7-1-1: Technologies
7-1-2: Controlling Technologies
7-2-1: Scale
7-2-2: Units
7-3-1: Introduction to I/O Control
7-3-2: CIF Control
7-3-3: GDS Control
7-3-4: EDIF Control
7-3-5: LEF/DEF Control
7-3-6: CDL Control
7-3-7: DXF Control
7-3-8: SUE Control
7-3-9: Gerber Control
7-3-10: SVG Control
7-4-1: Introduction to MOS Technologies
7-4-2: The MOSIS CMOS Technology
7-5-1: Introduction to Schematics
7-5-2: Multipage Schematics and Frames
7-6-1: The Artwork Technology
7-6-2: The FPGA Technology
7-6-3: The Generic Technology
Chapter 8: CREATING NEW TECHNOLOGIES
8-1: Technology Editing
8-2: Converting between Technologies and Libraries
8-3: Hierarchies of Technology Libraries
8-4: The Layer Cells
8-5: The Arc Cells
8-6: The Node Cells
8-7: Miscellaneous Information
8-8: How Technology Changes Affect Existing Libraries
8-9: Examples of Use
8-10: Technology XML File Format
8-11: The Technology Creation Wizard
Chapter 9: TOOLS
9-1: Introduction to Tools
9-2-1: Introduction to DRC
9-2-2: DRC Preferences
9-2-3: Design Rules
9-2-4: Coverage Rules
9-2-5: Assura DRC
9-3-1: Well and Substrate Checking
9-3-2: Antenna Rule Checking
9-4-1: Introduction to Simulation
9-4-2: Verilog
9-4-3: Spice
9-4-4: Special Spice and Verilog Nodes
9-4-5: FastHenry
9-5-1: IRSIM
9-5-2: ALS
9-5-3: ALS Concepts
9-5-4: ALS Gates
9-5-5: ALS Functions
9-5-6: ALS Models
9-6-1: Introduction to Routing
9-6-2: Auto Stitching
9-6-3: Mimic Stitching
9-6-4: Maze Routing
9-6-5: River Routing
9-6-6: Sea-of-Gates Routing
9-6-7: Clock Routing
9-7-1: Introduction to NCC
9-7-2: Commands
9-7-3: Preferences
9-7-4: Annotations
9-7-5: Graphical User Interface (GUI)
9-8-1: Pad Frame Generation
9-8-2: Other Generators
9-9: Logical Effort
9-10-1: Parasitic Extraction
9-10-2: Node Extraction
9-11: Compaction
9-12: Silicon Compiler
9-13: Placement
Chapter 10: THE JELIB AND DELIB FILE FORMAT
10-1: Introduction to File Format
10-2-1: Header, Views, Tools
10-2-2: External References
10-2-3: Technologies
10-3-1: Cells
10-3-2: Node Instances
10-3-3: Arc Instances
10-3-4: Exports
10-4-1: Variables
10-4-2: Text Descriptors
10-4-3: Example

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