7-5: The MOSIS CMOS Technology
This technology defaults to 4 metal layers (shown here), but can also be changed so that it uses anywhere from 2 to 6 layers of metal. It also has 1 polysilicon layer but can be changed to use 2. The technology can also be set to use either standard rules (SCMOS), submicron rules, or deep rules. You can choose whether to allow stacked vias and whether or not to use alternate contact rules. All of this is done with the Technology Options... command of the Technology menu.
The MOSIS CMOS technology also has two scalable transistor nodes that can be parameterized to have different widths. These transistors are not available by default, check "Show Special transistors" in the Technology Options... dialog to see them. (Checking that also provides a vertical PNP transistor that has marginal usefulness.) The scalable transistors have contacts built into them. When created and scaled, their maximum width is shown. However, by adding a "width" attribute, they can shrink arbitrarily. Note that the ports remain in the same location regardless of the width, thus allowing them to scale without affecting constraints.
The scalable transistor on the left is 3 wide, and the other two are 10 wide. However, the scalable transistor on the right has had the "width" attribute set to 8 and so it has shrunk. Note that this attribute can be derived from cell parameters, causing different instances of the same cell to have different size transistors in it.
|If you double-click on a scalable transistor, you get a specialized dialog that allows you to control it. You can choose to have zero or 1 contact, and you can tighten the contact spacing.
Another MOSOS CMOS technology option is to display with "stick figures". This is enabled by using the Technology Options... command of the Technology menu and checking the "Stick Figures" radio button.
Users of Electric version 6.02 or earlier will have a different MOSIS CMOS technology called "mocmossub". This technology attempted to match the submicron rule set, but did not do so as accurately as the current "mocmos" technology. If you have designs in that technology, they will be automatically converted to the new "mocmos" when read in, unless you uncheck "Automatically convert to new MOSIS CMOS" in the "MOSIS CMOS Submicron (old)" section of the dialog.
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